ECE Topics

One question per post, answered first and then worked through with real numbers, labelled diagrams, the mistakes that cost marks and three questions to check yourself. Each post also names the line of the official GATE 2027 EC syllabus it covers.

24 posts

How Far Does the Fermi Level Move When You Dope Silicon?

Each tenfold rise in doping moves silicon's Fermi level by 59.5 mV, since EF − Ei = kT ln(ND/ni): 0.347 eV for 10¹⁶ donors. Worked numbers, limits and mistakes.

7 min read
ecegateengineering-fundamentals

How Many Flip-Flops Does a Mod-N Counter Need?

A mod-N counter needs ⌈log₂N⌉ flip-flops: 4 for mod-10, 7 for mod-100. Why ripple counters pass through wrong counts on the way, and how to read them safely.

7 min read
ecegateengineering-fundamentals

Why Does a Zener Diode Hold Its Voltage, and When Does It Stop?

In breakdown a Zener's current can swing widely while its voltage barely moves, but only above a minimum. A worked regulator design shows where it stops.

7 min read
ecegateengineering-fundamentals

Why Can't AM Put More Than a Third of Its Power in the Sidebands?

In standard AM the sideband share is μ² ÷ (2 + μ²), and μ can't pass 1 without distortion, so it tops out at 1/3. The derivation and a worked 10 V example.

6 min read
ecegateengineering-fundamentals

How Does a Diode's Small-Signal Resistance Change With Bias Current?

A diode's small-signal resistance is rd = nVT ÷ ID: 258.5 Ω at 0.1 mA, 25.85 Ω at 1 mA, 2.585 Ω at 10 mA. The derivation, a worked example and when it fails.

7 min read
ecegateengineering-fundamentals

Why Does the Early Effect Give a BJT a Finite Output Resistance?

Raising VCE narrows the base, so IC creeps up and the BJT's output resistance is ro ≈ VA ÷ IC. The physics, a worked 50 V example and the effect on gain.

7 min read
ecegateengineering-fundamentals

Why Does a Fourier Series Overshoot by 9% at Every Jump?

The Gibbs overshoot: a square wave's partial sums peak near 1.179, about 9% of the jump, at any number of terms. Computed sums, a worked peak and the traps.

7 min read
ecegateengineering-fundamentals

How Does a Hamming (7,4) Syndrome Point to the Flipped Bit?

Each Hamming parity bit checks the positions whose binary index has that bit set, so the syndrome spells out the flipped position. A worked (7,4) example.

7 min read
ecegateengineering-fundamentals

What Do Students Get Wrong About Don't-Cares in K-Maps?

Don't-cares in a K-map are optional 1s, not compulsory ones. Four common mistakes, a worked example checked by brute force, and why minimal answers can differ.

7 min read
ecegateengineering-fundamentals

How Much Does the Miller Effect Cut Common-Emitter Bandwidth?

A 2 pF base-collector capacitance can act like 195 pF at a CE amplifier's input. A worked Miller effect example, the bandwidth it costs and how exact it is.

8 min read
ecegateengineering-fundamentals

How Does the Nyquist Criterion Handle a Pole on the jω Axis?

Indent the Nyquist contour around the pole, then map the detour: it becomes an infinite arc closing clockwise. Worked K/(s(s+1)(s+2)) example, stable for K < 6.

8 min read
ecegateengineering-fundamentals

Why Does an Op-Amp Integrator Saturate, and How Long Does It Take?

An ideal integrator has infinite DC gain, so any DC input ramps it into a rail: 0.5 V into 10 kΩ and 100 nF hits −12 V in 24 ms. The offset trap and the Rf fix.

7 min read
ecegateengineering-fundamentals

What Do You Do When a Routh Array Has a Zero in the First Column?

A lone zero in the Routh first column gets an ε; a whole zero row needs an auxiliary polynomial. Worked examples checked against the real roots, and the traps.

7 min read
ecegateengineering-fundamentals

Why Does Resistance Lower Q in Series RLC but Raise It in Parallel?

Series Q = ω0L/R falls as R rises; parallel Q = R/(ω0L) rises. Why, with one worked tank: L = 1 mH, C = 10 nF, Q = 31.6 at 10 Ω series or 10 kΩ in parallel.

7 min read
ecegateengineering-fundamentals

How Do You Calculate Setup and Hold Slack for a Flip-Flop Path?

Setup slack uses the slowest path and the clock period; hold slack uses the fastest path and no period. A worked 5 ns example with skew gives 0.9 and 0.05 ns.

7 min read
ecegateengineering-fundamentals

Why Does Copper at 1 GHz Carry Current in Only a 2 µm Layer?

Skin depth δ = 1/√(πfμσ) shrinks as 1/√f: copper's is 9.35 mm at 50 Hz, 66.1 µm at 1 MHz and 2.09 µm at 1 GHz. Where it comes from and what it does to a wire.

7 min read
ecegateengineering-fundamentals

How Do You Find Thevenin Resistance With No Independent Source?

With only dependent sources, Voc and Isc are both zero, so Voc ÷ Isc gives 0 ÷ 0. Use a test source: the method, a worked GATE EC example and the usual traps.

7 min read
ecegateengineering-fundamentals

How Do You Find a Load's Reflection Coefficient From Vmax and Vmin?

VSWR = Vmax ÷ Vmin gives |Γ|; the first minimum's position gives its phase. Worked 50 Ω line: VSWR 3, |Γ| = 0.5, return loss 6.02 dB, ZL = 24.05 − j30.50 Ω.

8 min read
ecegateengineering-fundamentals

Why Can the Same Z-Transform Belong to Two Different Signals?

A z-transform means nothing without its region of convergence: 1/(1 − az⁻¹) is aⁿu[n] or −aⁿu[−n−1]. Worked poles at 0.5 and 2, three ROCs, which is stable.

7 min read
ecegateengineering-fundamentals

Fourier Series for GATE Signals and Systems

Fourier series for GATE EC, EE and IN: the trigonometric and exponential forms, symmetry shortcuts, Parseval's theorem, and three worked examples including a square wave through a filter.

8 min read
gateengineering-fundamentals

GATE ECE Preparation: A Subject-by-Subject Study Order

A GATE ECE preparation order built from the official 2027 EC syllabus: which of the eight sections to study first, how they depend on each other, and a 17-week plan to the exam.

7 min read
gatestudy-timetableengineering-fundamentals

Network Theory Formulas to Know for GATE EC and EE

Network theory formulas for GATE EC and EE in one place: dividers, star-delta, first-order transients, RLC resonance and Q, complex power, two-port parameters and three-phase power, each with a worked number.

8 min read
gateengineering-fundamentals

PN Junction Diode for GATE: Concepts and Common Mistakes

The PN junction diode for GATE EC: built-in potential, depletion width and junction capacitance with a fully worked silicon example, and the mistakes that cost marks.

7 min read
gateengineering-fundamentals

Thevenin and Norton Theorems for GATE, with Solved Examples

Thevenin's theorem for GATE EC and EE: a two-source circuit and a bridge with a load to optimise, each worked two ways, plus maximum power transfer.

8 min read
gateengineering-fundamentals

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