Op-Amp Fundamentals: Inverting and Non-Inverting Amplifiers

The two ideal-op-amp rules

An op-amp has two inputs, V+V_+ and V−V_-, and (with negative feedback) two assumptions make circuit analysis almost algebra-free:

  • No current flows into either input terminal (infinite input impedance).
  • The op-amp drives its output to force V+=V−V_+ = V_-, the virtual short, even though the two inputs aren't actually connected.

Inverting amplifier

The input signal drives RinR_{in} into the V−V_- terminal, with a feedback resistor RfR_f from output back to that same terminal, while V+V_+ is grounded. Since V−V_- is forced to 00V (a "virtual ground") and no current enters the input, the current through RinR_{in} must equal the current through RfR_f, giving:

Gain=VoutVin=−RfRin\text{Gain} = \dfrac{V_{out}}{V_{in}} = -\dfrac{R_f}{R_{in}}

Worked example: inverting amplifier

Rin=1kΩR_{in}=1\text{k}\Omega, Rf=10kΩR_f=10\text{k}\Omega, Vin=0.5VV_{in}=0.5\text{V}:

Vout=−10k1k×0.5=−5VV_{out} = -\dfrac{10\text{k}}{1\text{k}} \times 0.5 = -5\text{V}

Non-inverting amplifier

The input signal now drives V+V_+ directly, and R1R_1 plus RfR_f form a voltage divider from output back to V−V_-, forcing V−=VinV_- = V_{in} by the virtual-short rule:

Gain=VoutVin=1+RfR1\text{Gain} = \dfrac{V_{out}}{V_{in}} = 1+\dfrac{R_f}{R_1}

always positive (no inversion) and always at least 1, even if Rf=0R_f=0. That special case, with Rf=0R_f = 0 and R1R_1 left out, is the voltage follower: gain exactly 1, used as a buffer because it draws almost no current from the source.

Worked example: non-inverting amplifier

R1=1kΩR_1=1\text{k}\Omega, Rf=9kΩR_f=9\text{k}\Omega, Vin=0.5VV_{in}=0.5\text{V}:

Vout=(1+9k1k)×0.5=10×0.5=5VV_{out} = \left(1+\dfrac{9\text{k}}{1\text{k}}\right) \times 0.5 = 10 \times 0.5 = 5\text{V}

Same gain magnitude (10) and output size as the inverting example above, but positive, and it took a resistor ratio of 9 rather than 10 to get there, a direct consequence of the +1+1 in the formula.

Inverting vs non-inverting: the differences

Inverting and non-inverting amplifiers compared
InvertingNon-inverting
Signal goes toV−V_- through RinR_{in}V+V_+ directly
Gain−RfRin-\dfrac{R_f}{R_{in}}1+RfR11 + \dfrac{R_f}{R_1}
Output phaseFlipped (180°)Same as input
Smallest gain magnitudeAny, including below 11 (voltage follower)
Input impedanceAbout RinR_{in}Very high

Worked example: a summing amplifier

Add a second input resistor to the inverting amplifier and the virtual ground adds the currents from both inputs:

Vout=−Rf(V1R1+V2R2)V_{out} = -R_f\left(\dfrac{V_1}{R_1} + \dfrac{V_2}{R_2}\right)

With R1=R2=Rf=10 kΩR_1 = R_2 = R_f = 10\text{ k}\Omega, V1=1V_1 = 1 V and V2=2V_2 = 2 V:

Vout=−10k(110k+210k)=−3 VV_{out} = -10\text{k}\left(\dfrac{1}{10\text{k}} + \dfrac{2}{10\text{k}}\right) = -3\text{ V}

Common mistakes

  • Dropping the minus sign. An inverting amplifier's output is always opposite in sign to its input.
  • Forgetting the +1+1. A non-inverting amplifier with Rf=9 kΩR_f = 9\text{ k}\Omega and R1=1 kΩR_1 = 1\text{ k}\Omega has a gain of 10, not 9.
  • Ignoring the supply rails. The output can't go beyond the supply voltages. A gain of −10-10 on a 2 V input asks for −20-20 V, but on a ±12\pm 12 V supply the output saturates near −12-12 V instead.
  • Using the virtual short without negative feedback. V+=V−V_+ = V_- only holds when the output is fed back to the inverting input. Without feedback (a comparator), the output just swings to a rail.

Where this comes up in exams

Op-amp circuits are listed in the GATE 2027 EC (amplifiers and summers, under Analog Circuits), EE (operational amplifiers) and IN (op-amp applications including the adder) syllabi. They are not in the JEE Main 2026 or NEET (UG) 2026 syllabi.

Checked against GATE 2027 EC syllabus, GATE 2027 EE syllabus, GATE 2027 IN syllabus, JEE (Main) 2026 syllabus (NTA) and NEET (UG) 2026 syllabus (NMC, published by NTA). Syllabi can change from year to year, so confirm with the latest official notification for your exam.

Continue learning

An op-amp is itself built from biased transistor stages internally, though it's normally treated as a single ideal block rather than analyzed transistor by transistor.

From past GATE papers